Perl, Python, constraint-random tests, Power-aware verification, formal static verification techniques, coverage-driven verification methodologies, Uvm, systemverilog

C, Makefile, Windows, Linux, Perl, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, debugging firmware and RTL code, graphics pipeline knowledge, HLS tools, UVM testbenches, automating workflows, simulation profile efficiency improvement, UVM based verification frameworks, TLM