schematic design, Soc Architecture, analog mixed-signal products, validation frameworks, system design and validation, Pcb Layout, ARM cores, Microcontrollers, power management, grounding, embedded hardware design, decoupling strategies

C, Firmware Development, Silicon Validation, Python, Scripting, protocol analyzers, logic analyzers, Oscilloscopes, DDR PHY architecture, JTAG debuggers, firmware validation, DDR5, DDR4, memory subsystem validation, LPDDR6, LPDDR5

Java, Tableau, Jira, Automation Frameworks, QA testing, Scripting Languages, Python, CAN protocols, Automotive Ethernet, Lucid, connectivity features, Xray

Pcie, C, Python, Scripting Languages, DDR, Soc Architecture, hardware software integration, Power Characterization, Emulation, RTL design verification

synplify , chipscope , Unix, Python Scripting, Linux, Tcl, Verilog, Ethernet, Perl, Pcie, Xilinx Vivado, High-Speed interfaces, systemverilog, FPGA Partial Reconfiguration PR flow, HW debugging skills using SignalTap, FPGA Digital Logic Design, AHB, Axi, Questa, Avalon bus protocols, HPS, Sta, XCelium, RTL design and verification using VHDL, altera quartus

Embedded C Programming, MIPS, Microcontrollers, System debugging skills, RISC-V, Embedded Systems, ARM Cortex M family, PCB schematics and layout, FPGAs

Automation Scripting, Usb, Tcl, Linux, Python, Perl, Pcie, firmware driver structures, silicon bring-up, power management optimizations, HSIO PCIe Coherency Interfaces, lab debug, logic analysers, Oscilloscopes, multi-meters

Python Scripting, ARINC 661, V V Verification Validation, Basic knowledge of coding, Experience with display projects

altium , teststand , Ansys, LabVIEW, Python, Function Generators, FPGA development, ALLEGRO, Vivado, Xilinx FPGA flow, Sigrity, Analyzers, Signal integrity analysis tools, Audio Generators