Integration, C, Gdb, Verilog, Scripting Languages, Python, Synthesis, RTL Build, Indago, Micro-Architecture, Cadence, SOC design, Physical Design, Rtl Design, Dft, Design Automation, Timing Closure, Verification, ASIC architecture

C, Scripting Languages, Gdb, Verilog, Python, Indago, Micro-Architecture, ASIC Architecture, SOC design, Cadence, Verification, Physical Design, Timing Closure, Rtl Design