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MTS SYSTEMS DESIGN ENGINEER

THE ROLE:

We are looking for a dynamic, energetic Lead / Staff Software Engineer to join our growing team in AI (Artificial Intelligence) group. In this role, the individual will be responsible for developing AI/ML specific C/C++ kernels and dataflow schedules for AMD Ryzen Processors built on XDNA Neural Processor Units (NPU) to map LLMs, Stable Diffusion networks on NPU. As a C++ Kernel Developer, you will play a crucial role in designing, optimizing, and implementing machine learning kernels specifically tailored for vector processors. Your work will directly impact the efficiency, speed, and accuracy of our machine learning models.

KEY RESPONSIBILITIES:

Kernel Development:

Design and implement highly optimized C++ kernel library for NPU/GPU.
Collaborate with the research and software teams to integrate these kernels into the existing software stack.

Vector Processor Optimization:

Work closely with hardware engineers to understand the architecture of VLIW vector core units such as MAC, GeMM, and non-linear functions.
Develop vectorized code that leverages SIMD (Single Instruction, Multiple Data) and ILP (instruction level parallelism) for maximum performance.

Performance Profiling and Tuning:

Profile and analyze the performance of existing kernels.
Identify bottlenecks and optimize critical sections for better throughput.

Testing and Validation:

Develop CPU models for the ML operators in C++/ Python to validate accuracy.
Write unit tests and integration tests to ensure correctness and reliability.
Validate kernel performance across different hardware platforms.

Documentation and Collaboration:

Document design specs for new kernels and the performance improvements.
Follow coding guidelines, use tools like git to maintain code and create pull-requests, and documentation.
Collaborate with cross-functional teams, including machine learning researchers and software engineers.

PREFERRED EXPERIENCE:

Excellent C/C++ and Python coding skills
Good understanding of SIMD/Tensor/VLIW processor architecture to exploit parallelism.
Experience with vectorized programming (SIMD) and parallel computing.
Familiarity with machine learning frameworks (e.g., TensorFlow, PyTorch) is a plus.
Experience with silicon bring-up and pre-silicon validation on Emulation platforms is a plus.
Knowledge of low-level hardware details (cache hierarchy, memory access patterns) is desirable.
Excellent problem-solving skills and a passion for performance optimization.

ACADEMIC CREDENTIALS:

BS/Masters/PhD degree in Computer Science, Electrical Engineering, or a related field with around 10/8/5 year experience respectively.

#LI-NR1

Benefits offered are described: .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available

This posting is for an existing vacancy.

Lead/Staff - Kernel Optimization Engineer (SIMD/VLIW Architectures)