C, Makefile, Hdl Programming, Perl, Verilog, Computer Architecture, Ruby, Python, System Verilog, AI tools, Functional Verification, UNIX software environment, logic simulation, Assembly Programming

Shell, Perl, Python, simulation and waveform analysis tools, verification methodologies, CPU microarchitecture, Uvm, coverage-driven verification, systemverilog, assertions, debugging skills, formal verification concepts, SVA

arm architecture , RIS tools, verification methodologies and tools, CPU verification

arm architecture , System Verilog, C, Python, CPU verification, verification methodologies and tools

Vcs, Xcelium, Questa, Uvm, systemverilog

C C++, CPU internals, Emulation

C, Ovm, virtualization, Perl, Python, Tcl, Client Server centric CPU features, SystemVerilog Assertions, Validation using Emulation and FPGA HW platforms, cache controllers, x86 assembly, semi randomized test generators, Uvm, systemverilog, validation strategy development, memory coherency, debugging test failures, power management, AI based methodologies in Validation, coverage driven Validation methodologies