Mentor Graphic Calibre DRC, Analog Layout fundamentals, Cadence VLE, AI-related tools

arm architecture , C, Ethernet, Pcie, Usb, DDR, HBM, Uvm, SoC DV execution, assertion-based formal verification tools, TLMs in SystemC, hardware emulation support

Cadence - Virtuoso, Tcl, Python, Perl, Spice Simulator, Synopsys, Uvm, SV, Mentor tools, Verilog-A, Verilog-D, Cadence, Verilog Hdl, Verilog-AMS, AMS simulation environment

Tcl, Python, PERL, RTL Synthesis, UPF, LEC, primetime, EDA Tools, Fusion Compiler, Timing Constraints, Tempus, Timing Signoff, Conformal, VCLP, Genus