SoC Verification, Uvm, Debugging Expertise, Verification Planning, C DPI Development, Scripting and Automation, systemverilog, Coverage-Driven Verification

Makefile, C, Systemc, Windows, Linux, Verilog, Shell, Ruby, System Verilog, Perl, graphics pipeline knowledge, debugging firmware and RTL code using simulation tools, IP level ASIC verification, HLS tools, UVM testbenches, TLM, UVM based verification frameworks, simulation profile efficiency improvement

Logic schematic analysis, Verilog simulations, gate level simulations, AI-assisted tools, Timing Analysis, UVM Test Bench, SystemVerilog PLI coding