Technical Leadership, GLS debugging, Processor Interconnect Fabric, Strategic Problem Solving, High and Low speed peripherals, Digital SOC design principles, systemverilog, AXI protocols, Advanced Debugging, Memory Security Boot, Verification Strategy and Architecture, Verification Methodology Innovation, AHB

Emulation, Silicon validation cycles, HW-SW co-development workflows, Verification strategies, Design Verification, Verification infrastructure

Pcie, Ethernet, Emulation, RISC-V architecture, Simulation, AMBA protocols, UCIe, assertion-based verification, Uvm, coverage-driven verification, FPGA prototyping, systemverilog, constrained-random verification, formal verification, high-performance SoC architectures, SERDES, CXL, hardware software co-verification