Unix, Usb, Jtag, Linux, Perl, Pcie, Ethernet, System Verilog, Python, UVM methodology, Design for Debug, TSN, ARM based SoC verification

Noc, C, Perl, Verilog, Python, power analysis, Synthesis, processor design, low power design techniques, arithmetic units, SoC designs, memory hierarchies, design of IPs and Subsystems, systemverilog, integration flows, Asic Design Verification, Fabrics, accelerators, micro-architecture, bus architectures