Verilog, formal verification, power-aware verification, Uvm, gate-level simulation, systemverilog, ASIC verification methodologies

C Programming, System Verilog, DSP Image RADAR processing, SOC Chip level Cluster Sub-System Verification, Interconnect NIC FlexNoC Cache Coherency, Uvm, Microcontroller and Microprocessor architecture, ARM Cores

UFS (Universal Flash Storage), C, C++, Makefile, Perl, Verilog, Ethernet, System Verilog, Verification tools such as VCS, System Verilog verification language, Uvm, Synopsys VIPs, Waveform analyzer, Asic Design Verification, ASIC flow, AXI-AMBA protocol variants, PCIe Protocol

Verilog, formal verification, VHDL, Chisel, JasperGold, VC Formal, Object-oriented Programming, systemverilog, Formal Abstraction Techniques