C, Makefile, Windows, Perl, Linux, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, HLS tools, Graphics pipeline knowledge, UVM testbenches, simulation profile efficiency improvement, UVM based verification frameworks, TLM, debugging firmware and RTL code using simulation tools

Perl, Python, SV – UVM Assertions based verification, RTL debug skills, ARM based system architecture, industry-standard simulation tools, power aware simulation, RTL design verification, Uvm, systemverilog, Firmware emulation, camera verification, Coverage closure, dpi