C, Fpga, Soc Architecture, Verilog, Scripting Languages, systemverilog, digital logic design principles, logic synthesis techniques, RTL design concepts, ASIC design methodologies, emulation platforms, low-power design techniques, assertion-based formal verification

simvision , pipelining , Vcs, Verilog, Static Timing Analysis, Design Compiler, primetime, Xcelium, clock domain crossing, Waveform tools, VHDL, Genus, RTL design and simulation tools, Digital logic design concepts, Verdi, Synthesis tools, systemverilog, Axi, FPGA ASIC design flow, BUS Protocols, Fsms, APB, Modelsim, AHB, Low-power design techniques

Version Control Systems, Tcl, Verilog, static timing analysis, Perl, Git, Shell, Perforce, Python, Scripting Languages, AHB, LEC, systemverilog, EDA Tools, LINT, Rtl Design, Synthesis, APB, Axi, SoC Architecture Design, SoC Integration, cdc, formal verification, AMBA protocols, Simulation

Embedded Firmware, Fpga, Microprocessors, Dfmea, Product Design, Dfm, Integration and validation testing, High speed digital electronic circuits, Test procedures definition and execution, Manufacturing failures analysis, Component obsolescence treatment, Signal Integrity, Electronic design and development, Electrical schematics, Microcontrollers, Hardware Verification, Root Cause Analysis, Dft, Board level testing, Design and simulation tools