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MTS SILICON DESIGN ENGINEER

THE ROLE:

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Develop UVM based verification environment and testbenches, automate processes and flows
Use AI tools, models extensively to augment SV/UVM test suite for efficient coverage closure.
Use Formal verification techiniques at SoC level verification
Work on SoC UPF power aware verification
Work on industry‑standard cryptographic and security algorithms (e.g., AES, RSA, SHA)
Work on Functional verification of SoC level Interconnect, NoC architecture desgin verification
SoC Performance verification on data paths Band width, Latencies involving coherent/ non-coherent paths to DDR
DFx/ DFT infrastructure functional verification
Build directed and random verification tests targetting functional and code coverage metrics closure
Work on functional verification of latest standards of high-speed bus protocols like PCIe, USB
Debug test failures to determine the root cause work with RTL and firmware engineers to resolve design defects and correct any test issues

Add directed or constrain random tests to meet the functional, code coverage requirements

PREFERRED EXPERIENCE:

Proficient in any or all of the following skills
Using UVM testbenches and working in Linux and Windows environments
Experienced with Verilog, System Verilog, and C
Developing UVM based verification frameworks and testbenches, processes and flows
Knowledge of industry‑standard cryptographic and security algorithms (e.g., AES, RSA, SHA)
Develop UVM based verification environment and testbenches, automate processes and flows
Use AI tools, models extensively to augment SV/UVM test suite for efficient coverage closure.
Experience in Formal verification techiniques at SoC level verification is preferrable
Work on SoC UPF power aware verification
Work on industry‑standard cryptographic and security algorithms (e.g., AES, RSA, SHA)
Knowledge of SoC level Interocnnects, NoC architecture designs.
SoC Performance verification on data paths Band width, Latencies involving coherent/ non-coherent paths to DDR
Build directed and random verification tests targetting functional and code coverage metrics closure
Work on latest standards of high-speed bus protocols like PCIe, USB
Debug test failures to determine the root cause work with RTL and firmware engineers to resolve design defects and correct any test issues
Desirable DFx/ DFT infrastructure functional verification
Knowledge of ISO26262 Functional safety verification is a plus
Experience in verifying multimillion gate chip designs from specifications to tape-out
Excellent communication and presentation skills

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering with 7+Yrs of exp

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Benefits offered are described: .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available

This posting is for an existing vacancy.

Functional Verification Engineer -SOC/IP