Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, BIOS, Uefi, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO peripherals, Axi, MIPI, SoC Verification

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, Uefi, BIOS, Pci, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO, MIPI, Axi, SoC Verification

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, BIOS, Uefi, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO peripherals, Axi, MIPI, SoC Verification

System Architecture, Usb, Embedded C, Uefi, Spi, C, Fpga, BIOS, Sata, Pcie, DDR, validation strategy, MIPI, Post Silicon Validation, high speed IO peripherals, Axi, emulation verification, Memory subsystem, Security Protocols, SoC Verification, technical debug, emulation platforms, SoC IP level Power Management, Validation, low power design, NPU, power management