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Senior ASIC Design Engineer - XBAR IP

nvidia ai
Bengaluru, India

Skills:

Vcs, Verilog, Gdb, ASIC design flow, Rtl Design, floor-planning, Eco, Timing Analysis, Debussy, bring-up lab debug

Early Applicant

Senior ASIC Design Engineer - XBAR IP

Nvidia
Bengaluru, India

Skills:

Vcs, Gdb, Shell, Perl, Verilog, Python, ASIC design flow, floor-planning, Timing Analysis, Rtl Design, Eco, Debussy, bring-up lab debug

Early Applicant

Senior Staff Engineer, RTL ASIC Design

Marvell Technology, Inc.
M
Bengaluru, India

Skills:

Spi, Uart, Verilog, Arm, System Verilog, I2c, Gpio, USB standards, Synopsys, ASIC design flow, Interconnect fabrics, Arteris fabrics, RTL Coding, Cadence, Scripting in Perl, Peripheral interface IPs, QSPI, I3C, System Verilog assertions, NoC architecture, Third-party IP integration, Axi

Early Applicant
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