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Showing 7 jobs
Skills:
PERL, Python, Tcl, Ir, Mentor, Cadence, LVS, EM Signoff, Synthesis, Formal Equivalence, DRC, Synopsys
Skills:
Oop, Java, Algorithms, Uml, Data structures, Eclipse, Python
Skills:
Sta, LINT, Synthesis, cdc, DDR families, front-end flows, post-silicon bring-up and debug, micro-architecture development, Rtl Design, FV, Asynchronous interface, Dft, ASIC Design, low-power checks, Low power SoC design, Multi Clock designs
Skills:
lean software development , Rest Api, Java, Spring MVC, Python, Angular 2.0, AWS cloud development, Automated testing frameworks
Skills:
Perl, Tcl, Skill, EDA Tools, Cadence Virtuoso
Skills:
Perl, Tcl, Full-custom memory layout development, EDA Tools, ERC, EMIR analysis, DRC, LVS, Cadence Virtuoso
Skills:
Perl, Python, Tcl, Clock domain partitioning, Power integrity and power-aware physical implementation, primetime, Block and subsystem-level physical design flows, Clock gating, Fusion Compiler, Congestion analysis and resolution, Clock tree architecture, Cadence Innovus, Tempus, Skew management, Certus, Synopsys ICC2, Timing closure and constraint management
