Debugging, Shell, Perl, Verilog, System Verilog, Python, Power aware implementation, Gate-Level Simulation, Assembly level testcases, Uvm, Testbench Architecture, systemverilog, Assertions, TCI, formal verification, Verification using UPF

Device Drivers, Linux kernel, Jira, Jenkins, Shell scripting, Testrail, Python, Network Analyzers, Oscilloscopes, peripheral validation, test frameworks, BSP bring-up, low-level debugging, GitLab CI, bootloader architecture, power analyzers, serial consoles

Spark, Pig, SQL Server, Postgres, HBase, Hadoop, Kafka, Etl, Sqoop, Cassandra, Hive, Oracle, Kubernetes, Python, Jenkins, Scala, Vela, CI CD, Drone, Teradata

Endpoint Security, Powershell, Bash, Itil, Gcp, Azure, Python, AWS, Tanium, Wiz, Crowdstrike, Defender, Rapid 7, oci

Unix, Linux, Windows, Python, Auditing, Disaster Recovery, Operations

static timing analysis, Python, Verilog RTL, Genus Design Compiler, scripting or programming languages, DFT methodologies, high-speed SerDes, ASIC synthesis, Asic Physical Design, physical verification DRC LVS, 3DIC implementation methodologies, Cadence Virtuoso, RTL Compiler, place-and-route Encounter Innovus ICC, Clock Tree Synthesis

Java, Golang, Javascript, Python, Sql, advertising technology, oRTB workflows