bist , C, Vcs, Verilog, Python, Asic verification, Genus Design Compiler, digital timing constraints, XCelium, high-speed SerDes, SOC interconnect fabrics, ASIC tool flows, Scan Insertion, DFT methodologies, Timing Analysis, systemverilog, FPGAs, ASIC synthesis, Questa tools, Axi, AMBA, Timing Constraints, ATPG, APB, microcontroller platforms, Cadence Virtuoso, AHB

Microsoft Hyper-v, BGP, C, Vmware Esxi, Gdb, Kvm, Wireshark, OSPF, Python, Qos, OpenStack, Go, qemu

Test Plans, Constraint-Random Coverage-Driven verification, coverage database visualization tools, Simulation Tools, Uvm, SVA, systemverilog

ATPG - TestKompress, Simulation - VCS, MBIST - Mentor ETVerify, Shell, Perl

Algorithms, Web Security, Tcp, Data Structure, Debuggers, C, Ips, Firewalls, Memory Management, Tdd, Idp, Computer Architecture, Tls, Python, multi-threading, Gdb, Http, Linux, Valgrind, Http proxy, DNS based security, CPU scheduling, network and web security technologies, unit testing frameworks

Ml, Automation, Python, TCAD, Ai, device physics, Process Simulation

Sql, Shell scripting, Grafana, Linux, Lsf, Tcl, Python, Perl, Jenkins, Git, Synopsys VCS, EDA Tools, Mentor Calibre, Sungrid UGE, Cadence Virtuoso

Github, Sql, Shell scripting, Grafana, Ldap, Lsf, Tcl, Python, Perl, Jenkins, Gnu Make, Git, EDA Tools, Mentor Calibre, Synopsys VCS, Sungrid UGE, Cadence Virtuoso