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Showing 4 jobs
Skills:
Python, Tcl, ICCompiler2, primetime, Innovus, Fusion compiler, EDA Tools, processor designs, toplevel physical implementation, lower node technologies
Skills:
static timing analysis, Synthesis, signal integrity analysis, pads log management, Place And Route, RDL routing, Floor Planning, EDA tools for physical design and verification, power grid design, full-chip physical design, Timing Closure, bump placement, Clock Tree Synthesis
Skills:
Tcl, Python, processor designs, primetime, EDA Tools, Fusion Compiler, ICCompiler2, Innovus, lower node technologies, toplevel physical implementation
Skills:
Tcl, Python, Processor designs, Toplevel physical implementation
