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Showing 6 jobs
Skills:
C, Perl, Verilog, Gdb, Python, Indago, SOC design, Cadence
Skills:
Verilog, Static Timing Analysis, System Verilog, Spyglass CDC, Glitch analysis, SDC development
Skills:
C, Vcs, Perl, Verilog, Hardware Emulation Platforms, cdc, ASIC SoC development cycle, systemverilog, Rtl Design, spyglass, EVE, ASIC Design, Veloce, formal verification
Skills:
C, Vcs, Perl, Verilog, cdc, Hardware Emulation Platforms, systemverilog, Rtl Design, spyglass, EVE, Veloce, formal verification
Skills:
Networking Protocols, spyglass, Verilog RTL coding, Verplex LEC, high-speed serial interfaces, Synopsys Design Compiler, ASIC Design, multi-domain clock synchronization, high performance memory subsystems, ASIC debugging
Skills:
SDF, LINT, Sta, Dft, Synthesis, cdc, primetime, MMMC, Tempus, GLS
