Makefile, Systemc, Windows, Linux, Verilog, Ruby, System Verilog, Perl, graphics pipeline knowledge, Simulation Tools, IP level ASIC verification, debugging firmware and RTL code, automating workflows, HLS tools, UVM testbenches, TLM, UVM based verification frameworks, simulation profile efficiency improvement

Makefile, Windows, Perl, Linux, Verilog, Ruby, System Verilog, Systemc, TLM, IP level ASIC verification, debugging firmware and RTL code, graphics pipeline knowledge, HLS tools, Simulation Tools, UVM testbenches, automating workflows, simulation profile efficiency improvement, UVM based verification frameworks

C, Systemc, Windows, Linux, Makefile, Verilog, Ruby, System Verilog, Perl, debugging firmware and RTL code, graphics pipeline knowledge, Simulation Tools, IP level ASIC verification, automating workflows, UVM testbenches, HLS tools, TLM, UVM based verification frameworks, simulation profile efficiency improvement

C, Makefile, Soc Architecture, Windows, Perl, Linux, Verilog, Python, System Verilog, Systemc, ASIC Design Flow, debugging skills in functional simulations, UVM testbenches, automating workflows in a distributed compute environment, Asic Design Verification

Perl, Pcie, Python, Tcl, SV, ONFI, MBIST, AI tools and Methodologies, Uvm, NAND, DFT architecture, LPDDR, Test controller architecture