logic bist , Unix, Jtag, Linux, Perl, Tcl, Verilog RTL, Core DFT skills, silicon debug, memory and scan diagnostics, back-annotated gate level verification, Scan compression and insertion, ATPG, at-speed test, Memory BIST and repair scheme implementation, IJTAG, Fault Simulation

bist , Dft, SOC design, DFT techniques, Scan Insertion, ATPG