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LEC and CLP ENGINEER

The Role

The focus of this role is to plan and execute the LEC and CLP of IPs and its signoff. This involves ownership of LEC and CLP at all physical partition level.

Key Responsibilities

Responsible for LEC and CLP of physical partition including its waivers, reviews and signoff
Collaborate and support with implementation teams to achieve closure.
Debug failure/issues and drive them to closure

PREFERRED EXPERIENCE:

Experienced in LEC and CLP
Complete Understanding of synthesis and Low power flows including UPF
Have handled blocks with complex designs and their LEC/CLP lssues
Have debug experience to solve issues.
scripting and automation

Academic Credentials

Bachelors with 2 years of experience or Masters degree with 1 year of experience in Electrical Engineering

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's Responsible AI Policy is available here.

This posting is for an existing vacancy.