rtl verification , Debugging, memory consistency models, coverage analysis, Axi, cache coherence, Uvm, CHI protocols, systemverilog

Cache coherency protocols (AMBA5 CHI, AXI5/ACE5), SystemVerilog UVM verification, Verification IP development, Functional verification of coherent/non-coherent IP designs, Scripting in Perl/Python/Shell, Object-oriented programming concepts

arm architecture , AMBA protocols, UPF, GLS, formal verification