m Verilog assertions, and ensuring design correctness through rigorous verification.

Key Responsibilities:

Analyze design specifications and develop comprehensive verification plans.
Implement and analyze SystemVerilog assertions and coverage metrics (code, toggle, functional).
Collaborate with architects, designers, and both pre- and post-silicon teams to resolve issues.
Use verification tools (VCS, waveform analyzers) and third-party VIPs (e.g., Synopsys VIPs).
Develop and execute tests in UVM environment combining native Verilog, SystemVerilog, and C/C++.
Work with scripting languages including Shell, Makefile, and Perl to automate and manage workflows.
Apply strong debugging and problem-solving skills to identify and fix design issues.
Maintain adherence to quality standards and best verification practices.

Minimum Qualifications:

Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, or related field.
3+ years of relevant hardware verification experience (IP or SoC level).
Experience with UFS, Ethernet, PCIe protocols preferred.
Proficiency in SystemVerilog, UVM, and C/C++.
Familiarity with AXI-AMBA protocols and ASIC design flow concepts.
Skilled in scripting for verification environments (shell, Perl).
Experience with verification tools (VCS, waveform analysis, VIPs).

1a:T4ac,QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer

SOC Design Verification Staff Engineer