C, Fpga, Usb, Embedded C, Linux, BIOS, Pcie, Uefi, emulation verification, Memory subsystem, Security Protocols, SoC IP level Power Management flow, SoC Verification, ARM SoC Architecture, Windows Operating Systems, emulation platforms, Validation, high speed IO peripherals, low power design, Pre-Silicon Validation Experience, NPU, power management

System Verilog, low-power design verification, Uvm

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, Uefi, BIOS, Pci, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO, MIPI, Axi, SoC Verification

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, BIOS, Uefi, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO peripherals, Axi, MIPI, SoC Verification

Embedded C, Fpga, C, Spi, DDR, Pcie, Sata, Usb, BIOS, Uefi, System Architecture, emulation verification, Post Silicon Validation, Memory subsystem, technical debug, Security Protocols, NPU, power management, emulation platforms, SoC IP level Power Management, Validation, low power design, validation strategy, high speed IO peripherals, Axi, MIPI, SoC Verification