Shell, Tcl, Python, Signal integrity crosstalk, Cadence Innovus, CTS Routing, Fusion Compiler, Static Timing Analysis STA, primetime, Tempus, Synopsys ICC2, Voltus, ASIC SoC design flow, Floorplanning Placement, Power analysis IR EM, Mentor Graphics tools Calibre DRC LVS, Process technologies 7nm 14nm 28nm

synopsys primetime , Synopsys ICC2, Cadence Innovus, Low power design techniques, MCMM analysis, Timing Closure, Asic Physical Design

Tcl, Shell scripting, Python, Fc, Innovous, Tempus, primetime