code coverage , Usb, Hdl Languages, DDR, Shell, Pcie, Perl, Ethernet, Debugging, Python, verification test plans, constrained-random test cases, UCIe, Uvm, systemverilog, CXL, simulation test benches, architectural design specifications, verification requirements

rtl verification , Protocol Knowledge (DDR, AMBA), Scripting (TCL, Python), Pcie, Perl, systemverilog, Uvm, Functional Coverage