FPGA Design Flow, Debugging and problem-solving skills, Timing Closure, Digital logic design using FPGAs, Timing Analysis, Verilog RTL design

Usb, Verilog, Ethernet, Pcie, DDR, Synthesis, FPGA design tools, Intel Quartus, AMBA bus protocols, Xilinx Vivado, Low power design techniques, systemverilog, SoC integration, Rtl Design, Static RTL checks, Lattice Diamond, STA timing closure, Axi