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ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years

Cisco Live
Bengaluru, India

Skills:

System Verilog, DFT CAD development, Test Static Timing Analysis, JTAG protocols, Logic Equivalency checking, ATPG, Post-silicon validation, Test Architecture Methodology and Infrastructure, Scan and BIST architectures

Early Applicant

ASIC Engineering Technical Lead :: DFT/MBIST/ATPG/Scan Insertion :: Exp 12+ Years

Cisco Home
Bengaluru, India

Skills:

Static Timing Analysis, System Verilog, DFT CAD development, JTAG protocols, Logic Equivalency checking, ATPG, Post-silicon validation, Test Architecture Methodology, Scan and BIST architectures, Verilog design

Early Applicant
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