Noc, C, Perl, Verilog, Python, power analysis, Synthesis, processor design, low power design techniques, arithmetic units, SoC designs, memory hierarchies, design of IPs and Subsystems, systemverilog, integration flows, Asic Design Verification, Fabrics, accelerators, micro-architecture, bus architectures

DFT (Design for Testing), System Verilog, low power design, SOC design, Clock/Voltage Domain Crossing