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Showing 2 jobs
Skills:
Verilog, Static Timing Analysis, System Verilog, Spyglass CDC, Glitch analysis, SDC development
Skills:
Tcp, Pcie, Ethernet, System Verilog, Forwarding logic Parsers P4, RDMA, Building test benches from scratch, System Verilog constraints structures and classes, Palladium, Verifying sophisticated blocks clusters and top level for ASIC, Zebu, Veloce, ASIC verification using UVM, HAPS, formal verification
