arm architecture , C, Ethernet, Pcie, Usb, DDR, assertion-based formal verification tools, Uvm, SoC DV execution, TLMs in SystemC, HBM, hardware emulation support

arm architecture , C, Usb, DDR, Pcie, Ethernet, SoC DV execution, hardware emulation support, TLMs in SystemC, Uvm, assertion-based formal verification tools, HBM

C, Requirements Traceability, Test Plan Creation, Tcl, Verilog, System Verilog, Python, Perl, Microprocessor architecture, interconnect, Assertions, UVM methodology, Gate Level Simulation, Testcase creation, Directed and constrained random methodologies, Metric Driven Verification, Coverage closure, Formal verification methodologies, SoC Verification, Functional and code coverage