synopsys primetime , Synthesis, Synopsys FusionCompiler, Timing Signoff Tools, Physical Design Flow, SDC Proficiency

Perl scripting, SoC design and implementation methodology, Synthesis, Digital ASIC design, primetime, Flow automation, Physical Design, Constraint development, Functional and DFT modes

Perl, Static Timing Analysis, Python, Tcl, ECO Flows, CTS, Clock Tree Analysis, Signal Integrity, RTL-to-GDSII flow, Physical Design, MMMC Analysis, Timing Closure, SDC Constraints, Low-power timing analysis

synopsys primetime , Debugging, Python, Perl, Tcl, OCV, timing closure techniques, latency, multicycle paths, derates, MMMC concepts, SDC timing exceptions, timing constraints development, POCV, ECO methodologies, clock uncertainty, Case Analysis, setup hold analysis, Cadence Tempus, clock tree, path-based analysis, jitter, false paths, Timing Closure, AOCV, skew