Ovm, Spi, Soc Architecture, Verilog, I2c, System Verilog, Python, Usb, Perl, Ethernet, Arm, Tcl, Bus Matrix design, MIPS, DFT concepts, Uvm, Rtl Design, Synthesis, RDC, Power estimations, Timing constraint SDC, ASIC design flow, LINT, Formal CDC, MBIST, Axi, AMBA, BUS Protocols, Low-power design, Timing Analysis, peripheral IPs