Minimum qualifications:

Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of experience with verification methodology such as Universal verification methodology (UVM).
2 years of experience in the verification of Intellectual Property (IP) designs such as IP, System on a Chip (SoC), vector CPUs, etc.
Experience with SystemVerilog, SystemVerilog Assertions (SVA), and functional coverage.

Preferred qualifications:

Master's degree in Electrical Engineering or a related field.
Experience with industry-standard simulators, revision control systems, and regression systems.
Experience with the full verification lifecycle.
Experience in Artificial Intelligence/Machine Learning (AI/ML) Accelerators or vector processing units.
Excellent problem solving and communication skills.

About the jobIn this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will own the full verification lifecycle from verification planning and test execution to coverage closure, with meeting Artificial Intelligence/Machine Learning (AI/ML) performance and accuracy goals, build constrained-random verification environments capable of exposing corner-case bugs and ensuring the reliability of Artificial Intelligence/Machine Learning (AI/ML) workloads on Tensor Processing Unit (TPU) hardware. You will collaborate with design and verification engineers in projects and perform verification.

The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Measure to identify verification holes to show progress towards tape-out.
Create a constrained-random verification environment using SystemVerilog and Universal verification methodology (UVM).

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Silicon Design Verification Engineer, TPU, Google Cloud

Silicon Design Verification Engineer, Google Cloud