rtl development , system integration, Verilog, Soc Architecture, architecture-performance-power-area tradeoff analysis, NoCs, memory hierarchies, bus architectures, systemverilog

Uart, Dac, Usb, Ethernet, Spi, Pcie, Gate-level simulations, systemverilog, EDA Tools, Mentor Questa, SVA, assertions, power-aware simulations, security IPs, SoC-level verification, eSPI, Cadence Xcelium, Uvm, UPF, crypto engines, PLLs, ADC, Synopsys VCS, low-power verification, I²C, functional coverage, Flash Memory, constrained-random verification, common Analog IPs, ARM-based microcontrollers

snowflake , Java, Aws Redshift, Cloudformation, Scala, Kafka, Pulumi, Apache Airflow, Azure Synapse, Docker, Terraform, Spark, Databricks, Azure, Kubernetes, Python, AWS, Flink, dbt, GCP BigQuery

Java, CSS, Data Structures, Version Control, Node.js, HTML, Sql, Microservices, Nosql, Git, Algorithms, Javascript, Restful Apis, Python, Cloud-native Architectures, Agile Product Development, Object-Oriented Programming

Enterprise Integration, Ml, Gdpr, Microservices, Python, Data Privacy, Apis, Javascript, Ai, AI risk assessment