rtl development , power delivery , Verilog, ASIC design flow, Dft, mixed-signal chips, Behavioral Circuit Modeling, Timing Analysis, Custom Digital Design, power management solutions, System-Verilog

Lsf, Machine Learning, Neural Networks, Shell, Perl, Verilog, Python, System Verilog, Tcl, Sta, Rtl Design, Synthesis, constraints development

rtl development , Digital Design, HSIO standards, AI tools, protocols, Verification, micro-architecture