Perl, Python, Sequencers, Agents, Checkers, Uvm, Functional coverage, systemverilog, Assertions, Coverage models, Verilog-AMS, Verification methodology, Scoreboards, Monitors, Constrained random techniques, Verilog-A

code coverage , C, Shell, Perl, Verilog, Debugging, Python, System Verilog, Tcl, UVM methodology, Metric Driven Verification, formal verification methodologies, assertions, constrained random methodologies, functional coverage

Unreachability (UNR) analysis, RTL and Gate-Level Simulations (GLS), Formal Property Verification (FPV), Reset Domain Crossing (RDC) assertions, SystemVerilog (SV), Shell scripting, UVM methodologies, Connectivity checks, Power-aware simulations