Verilog, System Verilog, LPDDR, Uvm, DDR memory protocols, HBM, Functional Verification

SI PI design, customer Interposer and Package designs, HBM PHY, project gate design reviews

Systemc, Test Planning, C, Shell, Tcl, Verilog, Python, systemverilog, NoC bus and interconnect verification, assertions, transaction-level modeling, UVM-based testbench development, constrained-random verification, formal verification, power-aware verification