C, Makefile, Windows, Shell, Linux, Perl, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, graphics pipeline knowledge, HLS tools, UVM testbenches, automating workflows in a distributed compute environment, developing UVM based verification frameworks, simulation profile efficiency improvement, TLM, debugging firmware and RTL code using simulation tools

Usb, C, Makefile, Windows, Shell, Perl, Linux, Pcie, Verilog, Ethernet, Ruby, System Verilog, Systemc, IP level ASIC verification, Graphics pipeline knowledge, acceleration HLS tools process, UVM testbenches, automating workflows in a distributed compute environment, AXI ACE Protocols, simulation profile efficiency improvement, UVM based verification frameworks, TLM, debugging firmware and RTL code using simulation tools

Systemc, Verilog, System Verilog, C, Developing UVM based verification frameworks and testbenches, Debugging firmware and RTL code using simulation tools, Graphics pipeline knowledge, HLS tools, UVM testbenches, Simulation profile efficiency improvement, IP level ASIC verification, TLM