Dac, Digital Signal Processing, Analog Design, Sigma Delta ADC, Signal Processing

Matlab, Worst case identification, Monte Carlo analysis, Physical layout management, AMs, Analog Circuit Design, Spectre, Cadence tool set, Top level simulation, Simplis, Post layout parasitic extraction, Schematic generation and simulation, Top level verification, Knowledge of device physics and process technologies, Block level modelling, Simulation data analysis, IC transistor level implementation, IC system partitioning and architectural tradeoff analysis, Power IC design, Signal grounding and routing tradeoffs, Die area optimization

UNIX, signals systems and transforms, MOS transistors, Analog Circuit Design, layout tradeoffs, layout verification tools, device physics, High Volume Manufacturing, feedback systems, Mixed Signal Design, AC DC analysis, circuit simulation tools, CMOS Bi-CMOS fabrication processes, poles zeros compensation, loop dynamics, Modeling Tools, end-to-end design flow

Dll, Dac, ADC, FinFET process technologies, Voltage detectors, Oscillators, Deep sub-micron technologies, Mixed Signal Design, Mixed-mode simulations, Voltage and current references, Pll, Simulation of analog blocks, power management, Clock management, Statistical simulations, Switching regulators, Signal Processing

Cadence Virtuoso, analog and mixed-signal circuit design, Signal Integrity, advanced CMOS technology nodes, jitter, high-speed analog architectures, Spectre