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Showing 6 jobs
Skills:
Verilog, System Verilog, Assertion Checker Development, Coverage Closure, Functional Coverage Development, Testcase Planning Development, UVM Testbench Coding, IP SOC Verification, Design Verification Failure Debugging

Skills:
C, DDR, Perl, System Verilog, Python, Tcl, AMBA protocols, Uvm, Axi, HBM, APB, LPDDR, AHB
Skills:
x86 assembly language , C, Perl, Ovm, Arm, Python, SVTB, CPU Architecture, Uvm, Power Management Verification
Skills:
System Verilog, Building test benches from scratch, ASIC verification using UVM
Skills:
Git, Confluence, Perl, Jira, Python, CPF, Uvm, UPF, systemverilog
Skills:
Perl, Verilog, Python, Synopsys VCS, Cadence Incisive, formal verification, VHDL, Modelsim, Uvm
