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Showing 3 jobs
Skills:
Shell, Python, Tcl, Signal integrity crosstalk, primetime, Process technologies 7nm 14nm 28nm, Fusion Compiler, Tempus, Cadence Innovus, Static Timing Analysis STA, Floorplanning Placement, Voltus, Mentor Graphics tools Calibre DRC LVS, CTS Routing, Power analysis IR EM, ASIC SoC design flow, Synopsys ICC2
Skills:
Debugging, Routing, CTS, Problem-solving skills, floorplanning, Timing optimization, ASIC implementation, Physical design signoff, ECO implementation, Timing Closure, Physical Design, Placement, STA concepts
Skills:
Debugging, Routing, CTS, Problem-solving skills, floorplanning, Timing optimization, ASIC implementation, Physical design signoff, ECO implementation, Timing Closure, Physical Design, Placement, STA concepts
