Data Privacy, Azure, Python, data lake architectures, inference systems, cloud platforms, anonymization, MLOps practices, data governance tools, ETL ELT pipelines, distributed data pipelines, compliance frameworks, data processing systems, ML model deployment

Perl, Python, Tcl, Synopsys Formality, Power Management library cells, Static Low Power Verification

Java, Golang, Distributed Systems, Apis, Python, High Throughput System design, RPCs

Spi, DDR, Shell, Pcie, Debugging, I2c, Python, Scripting, Uart, Perl, Ethernet, Tcl, SoC emulation, Boot flow, High-speed protocols, HBM, ZeBu, emulation platforms, Memory interfaces, Palladium, system initialization, Security Architecture, Peripheral interfaces, Veloce, CXL, USB 3.0

I2c, Python, PCB back-end process, DFA, Logic Analyzers, LPDDR4 5, Buck and Boost PMIC, Oscilloscopes, PCIe interface Gen5 Gen6, Dfm, SMBus, DC-DC converters, ONFI interface, Load Switch devices, Power Analyzers, LDO, I3C, NAND memories, PCIe analyzers

Machine Learning, software debugging, Deep Learning, Python, AI inference on HW accelerators, low-level interactions between operating systems, on-device software development, agile software development practices, heterogeneous computing platforms, git-based SCM, AI software and model deployment for automotive platforms, Linux development environment, data structure and algorithm design, embedded systems software, AI frameworks, Qualcomm AI Stack products

Design Patterns, Java, Nodejs, Python, Scalable solutions

Logic Design, Perl, Python, Tcl, Sta, MBIST OCC validation flows, Mentor, Cadence, Physical design flows, SpyGlass DFT rules, Scan insertion and ATPG tools, Hierarchical DFT and SDC constraint management, Digital Circuit Design, SSN design and IEEE 1687 IJTAG standards, Synopsys, RTL design synthesis