Verilog, Python, bus architectures, Synopsys, performance modeling tools, Cadence Tools, accelerators, memory hierarchies, low-power design techniques, arithmetic units

Machine Learning, Pytorch, Docker, Natural Language Processing, Python, Kubernetes, Computer Vision, Vision-Language Models, Transformer architectures

layout and physical verification, jitter and signal equalization techniques, Cadence tool experience, Phase Interpolator, CMOS design, High Speed Clock Distribution, Bias and Bandgap Voltage Regulators, Low jitter PLL, CAD tools for circuit simulation, SERDES

Cadence tool experience, jitter and signal equalization techniques, Phase Interpolator, layout and physical verification, CMOS design, High Speed Clock Distribution, Bias and Bandgap Voltage Regulators, Low jitter PLL, CAD tools for circuit simulation, SERDES

Java, Python, Data Structures, Algorithms, Machine Learning, Database Management, Web Development, Cloud Computing, Software Engineering, Devops