Perl, Python, Tcl, Innovus, primetime, Calibre, StarRC, ICC2, Voltus

Routing, floorplanning, Sta, CTS, primetime, Fusion Compiler, ICC2, Innovus, PNR, Physical Design, Placement, Timing Closure, Sign-off

power integrity , Perl, Python, Tcl, physical design sign-off, static dynamic IR drop, physical ECOs, Cadence Voltus, electromigration, power-grid optimization, PG strengthening, Ansys RedHawk, EM IR analysis, vectorless EM IR analysis

power integrity , Routing, Synthesis, Multi-Voltage Domains, Sign-off, Physical Design implementation, Placement, Low-Power Design, Physical Verification, Timing Closure, floorplanning, CTS

static timing analysis, Perl, Tcl, Synthesis, Makefile scripting, physical design CAD flow, Mentor Calibre, Power Distribution, hierarchical P&R, Cadence Innovus, Cadence Genus, Floor Planning, physical design verification

hardware engineering , Static Timing Analysis (STA), Automation, Deep sub-micron technology, Multi-voltage domains, Circuit Design, Power gating, UPF, Physical Design, Synthesis, ASIC design flows, Sign-off optimizations, PNR, device physics, Low power design implementation