Cadence Virtuoso, Mixed-Signal IC Design, High-Speed ADC Design, Analog IC Design

Matlab, Spectre, Process technologies, Analog Circuit Design, Architectural tradeoff analysis, Monte Carlo analysis, AMs, Signal grounding, device physics, Schematic generation, Physical layout management, Block level topology selection, Post layout parasitic extraction, Simulation on modern CAD tools, Die area optimization, Simplis, Routing tradeoffs, Simulation verification, Top level simulation, IC system partitioning, Cadence tool set, Worst case identification

Synopsys, compensation techniques, high-speed TX, analog mixed signal design, Siemens, EDA Tools, noise analysis, transistor capacitor matching, transistor level circuit design, Pll, SERDES, Cadence