Silicon Validation, Chiplet-Based Power Systems, Control Loop Theory, Layout Oversight, Spectre, Bode Plots, Advanced Simulation, Transistor-Level Implementation, Compensation Techniques, System-Level Modeling, Stability Analysis, Cadence Virtuoso, Phase Margin, FinFET Process Nodes, Analog Mixed-Signal IC Design

bandgap references , temperature sensors , AC simulations, Schematic Maestro, frequency response, mixed-signal circuit design, low-noise Sigma-Delta converters, DC operating point, op-amps, mismatch analysis, biasing circuits, noise, INL, precision analog circuits, DNL, Stability, CMOS technologies, ADEXL, Layout XL, LDOs, THD, Spectre AMS, Cadence Virtuoso suite

power converters , Silicon Validation, High speed level shifters, Oscillators, Design extraction and simulation flows, DC-DC converters, Analog Circuit Design, Analog Buffers, Power IC development, Switching Converters, Op-Amps, Chip design verification, FET layouts, Control Loops, Analog layouts, Noise isolation techniques, LDOs, Voltage Regulators, Current Sense SAR ADCs, Charge Pumps, Comparators

Dac, Post-silicon validation, TX drivers, Synopsys, Voltage regulators, Mentor Graphics, CMOS Process Technology, Architecture and circuit design, CTLE, device physics, Clock generation and distribution circuits, ADC, Cadence, Custom high-speed digital circuits, DLLs, VGA

high-speed and low-power analog design, EDA Tools, advanced CMOS technologies, Mentor Graphics, analog and mixed-signal circuits, post-silicon validation, Cadence, lab-based debugging, Synopsys

Ddr, Esd, JEDEC, Analog Design, HBMS