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Showing 3 jobs
Skills:
Unix, Linux, Perl, Tcl, Low power verification, floorplanning, Placement, power analysis, PNR implementation
Skills:
low power design, Timing Closure, Synthesis, Verilog RTL development, Front-end EDA tools, RTL design verification, Digital IP ASIC design, Post silicon validation, Design quality checks
Skills:
low power design, Timing Closure, Synthesis, Verilog RTL development, Front-end EDA tools, RTL design verification, Digital IP ASIC design, Post silicon validation, Design quality checks
